An injection-locked ring PLL with self-aligned injection window

@article{Liang2011AnIR,
  title={An injection-locked ring PLL with self-aligned injection window},
  author={Che-Fu Liang and Keng-Jan Hsiao},
  journal={2011 IEEE International Solid-State Circuits Conference},
  year={2011},
  pages={90-92}
}
In modern analog front-ends, there is an increasing demand on high-performance analog-to-digital converters (ADCs), which require high sampling frequency and low-jitter sampling clock. This makes low-jitter phase-locked loops (PLLs) with jitter on the order of few picoseconds desirable. Unfortunately, due to stringent limit on die area, sometimes a PLL with a ring oscillator is the only choice. To get better phase noise, a wider loop bandwidth is needed to suppress the noise of the voltage… CONTINUE READING
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