An improved scheme for pre-computed patterns in core-based SoC architecture

Abstract

By advances in technology, integrated circuits have come to include more functionality and more complexity in a single chip. Although methods of testing have improved, but the increase in complexity of circuits, keeps testing a challenging problem. Two important challenges in testing of digital circuits are test time and accessing the circuit under test… (More)
DOI: 10.1109/EWDTS.2016.7807719

Topics

Cite this paper

@article{Sadredini2016AnIS, title={An improved scheme for pre-computed patterns in core-based SoC architecture}, author={Elaheh Sadredini and Reza Rahimi and Paniz Foroutan and Mahmood Fathy and Zainalabedin Navabi}, journal={2016 IEEE East-West Design & Test Symposium (EWDTS)}, year={2016}, pages={1-6} }