This brief proposes an improved XOR logic gate and a novel full adder. The presented XOR has simple structure which consists of 2 CMOS transistors and 4 memristors, and it reduces 4 CMOS transistors compared with the previous. In addition, the novel full adder consists of 7 CMOS transistors and 10 memristors. This novel full adder reduces 8 CMOS transistors and 2 memristors, which means the size of the circuit is smaller and power consumption is lower. Through analysis and simulation, the feasibilities of the improved XOR logic gate and novel full adder are demonstrated.