An efficient register optimization algorithm for high-level synthesis from hierarchical behavioral specifications

@article{Vemuri2002AnER,
  title={An efficient register optimization algorithm for high-level synthesis from hierarchical behavioral specifications},
  author={Ranga Vemuri and Srinivas Katkoori and Meenakshi Kaul and Jay Roy},
  journal={ACM Trans. Design Autom. Electr. Syst.},
  year={2002},
  volume={7},
  pages={189-216}
}
We address the problem of register optimization that arises during high-level synthesis from modular hierarchical behavioral specifications. Register optimization is the process of grouping carriers such that each group can be safely allocated to a hardware register. Global register optimization by inline expansion involves flattening the module hierarchy and using a heuristic register optimization procedure on the flattened description. Although inline expansion yields a near-optimal number of… CONTINUE READING
6 Citations
3 References
Similar Papers

References

Publications referenced by this paper.
Showing 1-3 of 3 references

Similar Papers

Loading similar papers…