An efficient page-level FTL to optimize address translation in flash memory

@inproceedings{Zhou2015AnEP,
  title={An efficient page-level FTL to optimize address translation in flash memory},
  author={You Zhou and Fei Wu and Ping Huang and Xubin He and Changsheng Xie and Jian Zhou},
  booktitle={EuroSys},
  year={2015}
}
Flash-based solid state disks (SSDs) have been very popular in consumer and enterprise storage markets due to their high performance, low energy, shock resistance, and compact sizes. However, the increasing SSD capacity imposes great pressure on performing efficient logical to physical address translation in a page-level flash translation layer (FTL). Existing schemes usually employ a built-in RAM cache for storing mapping information, called the mapping cache, to speed up the address… CONTINUE READING
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