An efficient SQRT architecture of Carry Select adder design by Common Boolean logic

@article{Manju2013AnES,
  title={An efficient SQRT architecture of Carry Select adder design by Common Boolean logic},
  author={S. Manju and V. Sornagopal},
  journal={2013 International Conference on Emerging Trends in VLSI, Embedded System, Nano Electronics and Telecommunication System (ICEVENT)},
  year={2013},
  pages={1-5}
}
Carry Select adder (CSLA) is known to be the fastest adder among the Conventional adder structures. This work uses an efficient Carry select adder by sharing the Common Boolean logic (CLB) term. After a logic simplification, we only need one OR gate and one inverter gate for carry and summation operation. Through the multiplexer, we can select the correct output according to the logic states of the carry in signal. Based on this modification Square root CSLA (SQRT CSLA) architecture have been… CONTINUE READING
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