An efficient BICS design for SEUs detection and correction in semiconductor memories

  title={An efficient BICS design for SEUs detection and correction in semiconductor memories},
  author={Balkaran S. Gill and Michael Nicolaidis and Francis G. Wolff and Christos A. Papachristou and Steven L. Garverick},
  journal={Design, Automation and Test in Europe},
  pages={592-597 Vol. 1}
In this paper we propose a new Built in Current Sensor (BICS) to detect single event upsets in SRAM. The BICS is designed and validated for 100nm process technology. The BICS reliability analysis for process, voltage, temperature, and power supply noise are provided. This BICS detect various shapes of current pulses generated due to particle strike. The BICS power consumption and area overhead are also provided. This BICS found to be very reliable for process, voltage and temperature variation… CONTINUE READING
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Nicolaids. Upset-tolerant cmos sram using current monitoring: Prototype and test experiments

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  • International Test Conference,
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