An asynchronous hierarchical router for networks-on-chip-based three-dimensional multi-processor system-on-chip

Abstract

Three-dimensional networks-on-chip (3D NoC) are rising as a good approach to well managed complex interconnections in 3D multi-processor system-on-chip (MPSoC). This paper introduces a new router in order to enhance throughput and latency compared to classic 3D mesh NoC. The proposed router is hierarchical as it is composed of two completely decoupled… (More)
DOI: 10.1002/spe.1150

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@article{Lafi2012AnAH, title={An asynchronous hierarchical router for networks-on-chip-based three-dimensional multi-processor system-on-chip}, author={Walid Lafi and Didier Lattard and Ahmed Amine Jerraya}, journal={Softw., Pract. Exper.}, year={2012}, volume={42}, pages={877-890} }