An architecture-driven metric for simultaneous placement and global routing for FPGAs

@inproceedings{Chang2000AnAM,
  title={An architecture-driven metric for simultaneous placement and global routing for FPGAs},
  author={Yao-Wen Chang and Yu-Tsang Chang},
  booktitle={DAC},
  year={2000}
}
FPGA routing resources typically consist of segments of various lengths. Due to the segmented routing architectures, the traditional measure of wiring cost (wirelength, delay, congestion, etc) based on geometric distance and/or channel density is no longer accurate for FPGAs. Researchers have shown that the number of segments, instead of geometric (Manhattan) distance, traveled by a net is the most crucial factor in controlling the routing delay and cost in an FPGA. Further, the congestion… CONTINUE READING
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