An architectural power estimator for analog-to-digital converters

@article{Huang2004AnAP,
  title={An architectural power estimator for analog-to-digital converters},
  author={Zhaohui Huang and Peixin Zhong},
  journal={IEEE International Conference on Computer Design: VLSI in Computers and Processors, 2004. ICCD 2004. Proceedings.},
  year={2004},
  pages={397-400}
}
This paper presents an architectural power estimation tool that can accurately estimate the power consumptions of analog-to-digital converters. Combining the advantages of both the bottom-up approach and the top-down approach, the estimator can help AMS SoC designer on high-level power optimized design without detailed knowledge of the circuit. The three-stage estimation process makes the estimator appropriate for architectural exploration of designs employing low power techniques. The… CONTINUE READING