An all-digital DFT scheme for testing catastrophic faults in PLLs

@article{Azas2003AnAD,
  title={An all-digital DFT scheme for testing catastrophic faults in PLLs},
  author={Florence Aza{\"i}s and Yves Bertrand and Michel Renovell and Andr{\'e} Ivanov and Sassan Tabatabaei},
  journal={IEEE Design & Test of Computers},
  year={2003},
  volume={20},
  pages={60-67}
}
Traditional functional testing of mixed-signal ICs is slow and requires costly, dedicated test equipment. The authors update the standard PLL architecture to allow simple digital testing. The all-digital strategy yields catastrophic fault coverage as high as that of the classical functional test, plus it is fast, extremely simple to implement, and requires only standard digital test equipment. 
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