An algorithm for multiplication modulo (2/spl and/N-1)

@article{Wang1995AnAF,
  title={An algorithm for multiplication modulo (2/spl and/N-1)},
  author={Zhongde Wang and Graham A. Jullien and William C. Miller},
  journal={Proceedings of the 39th Midwest Symposium on Circuits and Systems},
  year={1995},
  volume={3},
  pages={1301-1304 vol.3}
}
This paper proposes an efficient algorithm for multiplication modulo (2/sup N/-1). To achieve high speed, the Wallace tree is adopted for the multiplier. The Wallace tree multiplier exhibits a more regular structure than binary Wallace tree multipliers, and comparisons with published designs demonstrates advantages of our multiplier architecture in both speed and hardware. 

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