An On-Chip Debug System

@inproceedings{Stollon2011AnOD,
  title={An On-Chip Debug System},
  author={Neal Stollon},
  year={2011}
}
In this chapter we look at an on-chip debug system (OCDS) that addresses processor instrumentation requirements through a JTAG interface. The general on-chip debug system discussed provides a range of typical hardware monitoring and debug control features for a design. Notably it allows several breakpoints to be set and memory locations to be observed during run time. This example does not provide trace capabilities; they are discussed in a separate chapter. 

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