An LSI implementation of generalized transversal filters


This correspondence describes an LSI implementation of a programmable FIR filter based on a generalized transversal filter structure. The overall structure is in the form of tapped and cascaded linear phase FIR subfilters which are processed in parallel. The LSI contains 52 different filters, any one of which can be selected by six external pins. Each filter is equivalent to a conventional filter with about 40-50 filter lengths, and has a maximum sampling rate of 1.11 MHz. The 5.0 x 5.5 mm2 chip was fabricated using 1.5-pm double-level metal CMOS technology.

DOI: 10.1109/78.80792

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@article{Nakamura1991AnLI, title={An LSI implementation of generalized transversal filters}, author={Shogo Nakamura and Yukio Kadowaki and Shigeki Matsuoka}, journal={IEEE Trans. Signal Processing}, year={1991}, volume={39}, pages={227-230} }