• Corpus ID: 30486542

An Integrated Switching Technique for Minimizing Power Consumption Using MDFSD in Domino Logic System

@inproceedings{Muralidharan2016AnIS,
  title={An Integrated Switching Technique for Minimizing Power Consumption Using MDFSD in Domino Logic System},
  author={Jagan Muralidharan and Dr. P. Mamimegalai},
  year={2016}
}
A domino logic technique is designed to meet the critical concern of the VLSI era with convenience and high microelectronic devices, power consumption of the digital circuit. The design and circuit performance improves the power consumption, area and delay of the circuit. If there is a path delay in wide fan multiplexers, then path reads out becomes more difficult and there is high power consumption due to switching activity, also it has high noise immunity in the dynamic gates. At a lower… 
1 Citations
Current Comparison Domino based CHSK Domino Logic Technique for Rapid Progression and Low Power Alleviation
TLDR
The proposed domino logic is developed with the combination of Current Comparison Domino (CCD) logic and Conditional High Speed Keeper (CHSK)Domino logic to improve the performance metrics like power, delay and noise immunity and based on the parasitic capacitance.

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