An Improved Synthesis Algorithm for Multiplexor-Based PGA's

Abstract

We address the problem of synthesis for a popular class of Promrnrnable Gate Array (PGA) architectures the multiulexor-based ~MB) architectures. Wepresent improved techniques ~or minimizing the number of basic blocks used to implement a combinational circuit. One source of improvement is the use of if-then-else dags as subject graphs along with BDD’s. An important contribution is a very fast algorithm which always gives a match for a function onto the basic block of the architecture, when one exists. On average, the results obtained on a set of benchmarks are 22’?70better than those of a tibrmy-based technology mapping [10] and Amap [4], 31% better than those of F’roserpine [5] and 17% better than those of mis-pga [2].

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Cite this paper

@inproceedings{Murgai1992AnIS, title={An Improved Synthesis Algorithm for Multiplexor-Based PGA's}, author={Rajeev Murgai and Robert K. Brayton and Alberto L. Sangiovanni-Vincentelli}, booktitle={DAC}, year={1992} }