Hmap: a fast mapper for EPGAs using extended GBDD hash tables
We address the problem of synthesis for a popular class of Promrnrnable Gate Array (PGA) architectures the multiulexor-based ~MB) architectures. Wepresent improved techniques ~or minimizing the number of basic blocks used to implement a combinational circuit. One source of improvement is the use of if-then-else dags as subject graphs along with BDD’s. An important contribution is a very fast algorithm which always gives a match for a function onto the basic block of the architecture, when one exists. On average, the results obtained on a set of benchmarks are 22’?70better than those of a tibrmy-based technology mapping  and Amap , 31% better than those of F’roserpine  and 17% better than those of mis-pga .