An FPGA-based re-configurable functional tester for memory chips

  title={An FPGA-based re-configurable functional tester for memory chips},
  author={Jing-Reng Huang and Chee-Kian Ong and Kwang-Ting Cheng and Mincent Lee},
  journal={Proceedings of the Ninth Asian Test Symposium},
The paper presents a prototype re-configurable tester for memory chips. The new tester consists of a memory test-circuitry compiler, a synthesis/mapping CAD tool, and an FPGA-based re-configurable hardware platform. The compiler makes user-specified parameters of memory under test (such as the address and data bus widths, the march test and the background data) as input and generates the test circuitry required to functionally, test the target memory chips. This framework not only enables the… CONTINUE READING

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