An FPGA-based In-Line Accelerator for Memcached

@article{Lavasani2013AnFI,
  title={An FPGA-based In-Line Accelerator for Memcached},
  author={Maysam Lavasani and Hari Angepat and Derek Chiou},
  journal={IEEE Computer Architecture Letters},
  year={2013},
  volume={13},
  pages={57-60}
}
We present a method for accelerating server applications using a hybrid CPU+FPGA architecture and demonstrate its advantages by accelerating Memcached, a distributed key-value system. The accelerator, implemented on the FPGA fabric, processes request packets directly from the network, avoiding the CPU in most cases. The accelerator is created by profiling the application to determine the most commonly executed trace of basic blocks which are then extracted. Traces are executed speculatively… CONTINUE READING
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