An FPGA Implementation of BPNs for FPGA Conf Rev a

Abstract

An investigation of the implementation and optimization of Beneš Permutation Networks on Field Programmable Gate Arrays (FPGAs) is presented. Specialized design automation tools were used to achieve high performance and efficient area utilization. These tools were used to explore alternative placement and routing strategies, and to take advantage of the… (More)

Topics

15 Figures and Tables

Cite this paper

@inproceedings{Pedersen2003AnFI, title={An FPGA Implementation of BPNs for FPGA Conf Rev a}, author={Richard Pedersen and Anatole D. Ruslanov and Jeremy R. Johnson}, year={2003} }