An External Test Approach for Network-on-a-Chip Switches

@article{Raik2006AnET,
  title={An External Test Approach for Network-on-a-Chip Switches},
  author={Jaan Raik and Vineeth Govind and Raimund Ubar},
  journal={2006 15th Asian Test Symposium},
  year={2006},
  pages={437-442}
}
Over the past few years, network-on-a-chip (NoC) has become increasingly popular as a scalable interconnect infrastructure for IP cores. Simultaneously to developing new design paradigms, testing strategies for such network architectures have to be considered. The previous works on testing NoCs have been mainly based on general purpose design-for-testability (DFT) approaches and there is a lack of test algorithms dedicated to on-chip networks. The main contribution of this paper is a well… CONTINUE READING
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Testing Strategies for Networks on Chip. In "Networks on Chip" by A.Jantsch, H.Tenhunen

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