An Execution Model for Hardware/Software Compilation and its System-Level Realization


We introduce a new execution model for orchestrating the interaction between the conventional processor and the re-configurable compute unit in adaptive computer systems. We then characterize the architectural and OS-level requirements of implementing the model, and demonstrate how they can be achieved on a real hardware platform running under a full scale… (More)
DOI: 10.1109/FPL.2007.4380661

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