An Embedded Reachability Analyzer and Invariant Checker (ERAIC)

Abstract

ERAIC (Embedded Reachability Analyzer And Invariant Checker) is an essential component in our new methodology for Formal Verification of "Concrete'' Digital Circuits. We apply Model checking to a Field Programmable Gate Array (FPGA)-based prototype of the circuit[1]. At the core of ERAIC is the process of state expansion of the reachability analysis in… (More)
DOI: 10.1109/MTV.2010.17

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Cite this paper

@article{Dahmoune2010AnER, title={An Embedded Reachability Analyzer and Invariant Checker (ERAIC)}, author={Ouiza Dahmoune and Robert de B. Johnston}, journal={2010 11th International Workshop on Microprocessor Test and Verification}, year={2010}, pages={47-50} }