An Efficient VLIW DSP Architecture for Baseband Processing

Abstract

The VLIW processors with static instruction scheduling and thus deterministic execution times are very suitable for highperformance real-time DSP applications. But the two major weaknesses in VLIW processors prevent the integration of more functional units (FU) for a higher instruction issuing rate – the dramatically growing complexity in the register file… (More)
DOI: 10.1109/ICCD.2003.1240911

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