An Efficient Implementation of Floating Point Multiplier using Verilog

@inproceedings{Shobha2015AnEI,
  title={An Efficient Implementation of Floating Point Multiplier using Verilog},
  author={G. Shobha and RUTHI and M. Rakhila and AJENDRA and RASAD},
  year={2015}
}
  • Shobha G., RUTHI, +2 authors RASAD
  • Published 2015
To represent very large or small values, large range is required as the integer representation is no longer appropriate. These values can be represented using the IEEE754 standard based floating point representation. Floating point multiplication is a most widely used operation in DSP/Math processors, robots, air traffic controller, digital computers. Because of its vast areas of application, the main emphasis is on the implementing it effectively such that it uses less combinational delay with… CONTINUE READING