An Efficient FPGA IP Core for Automatic Modulation Classification

@article{Cardoso2013AnEF,
  title={An Efficient FPGA IP Core for Automatic Modulation Classification},
  author={Claudomir Cardoso and Adalbery R. Castro and Aldebaro Klautau},
  journal={IEEE Embedded Systems Letters},
  year={2013},
  volume={5},
  pages={42-45}
}
This letter presents a new algorithm for automatic modulation classification (AMC) and its implementation and validation as an intellectual property (IP) core. AMC aims at accurately identifying the modulation scheme of a given communication system in a short period of time. The proposed IP core consists of a multiclass classifier composed by linear support vector machines and a new parameter extraction (front end) based on histograms. Based on its VHDL implementation and validation using FPGAs… CONTINUE READING

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