An Efficient Design of an FPGA-Based Multiplier Using LUT Merging Theorem

Abstract

FPGA (Field Programmable gate array) technology has become an integral part of todays modern embedded systems. All mainstream commercial FPGA devices are based upon LUT (Look-up Table) structures. As any m-input Boolean function can be implemented using m-input LUTs, it is a prime concern to reduce the number of LUTs while implementing an FPGA-based circuit… (More)
DOI: 10.1109/ISVLSI.2017.29

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