An Efficient Algorithm for Fast Parasitic Extraction and Passive Order Reduction of 3D Interconnect Models

@inproceedings{Marques1998AnEA,
  title={An Efficient Algorithm for Fast Parasitic Extraction and Passive Order Reduction of 3D Interconnect Models},
  author={Nuno Alexandre Marques and Mattan Kamon and Jacob K. White and Lu{\'i}s Miguel Silveira},
  booktitle={DATE},
  year={1998}
}
As VLSI circuit speeds have increased, the need for accurate three-dimensional interconnect models has become essential to accurate chip and system design. In this paper, we describe an integral equation approach to modeling the impedance of interconnect structures accounting for both the charge accumulation on the surface of conductors and the current traveling along conductors. Unlike previous methods, our approach is based on a modified nodal analysis formulation and can be used directly to… CONTINUE READING