An Asynchronous Binary-Search ADC Architecture With a Reduced Comparator Count

@article{Lin2010AnAB,
  title={An Asynchronous Binary-Search ADC Architecture With a Reduced Comparator Count},
  author={Ying-Zu Lin and S. Chang and Yen-Ting Liu and Chun-Cheng Liu and Guan-Ying Huang},
  journal={IEEE Transactions on Circuits and Systems I: Regular Papers},
  year={2010},
  volume={57},
  pages={1829-1837}
}
This paper reports an asynchronous binary-search analog-to-digital converter (ADC) with reference range prediction. An original N-bit binary-search ADC requires 2N - 1 comparators while the proposed one only needs 2N - 1 ones. Compared to the (high speed, high power) flash ADC and (low speed, low power) successive approximation register ADC, the proposed architecture achieves the balance between power consumption and operation speed. The proof-of-concept 5-bit prototype only consists of a… Expand
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