An Area Efficient Radix-4 Reciprocal Dual Trellis Architecture for a High-Code-Rate Turbo Decoder


This brief presents an area-efficient turbo decoder based on the reciprocal dual trellis. In this brief, the radix-4 structure is introduced into the reciprocal dual trellis for throughput enhancement, and a sign-arrangement technique is developed to simplify the hardware and reduce the critical path of the recursion metric unit. To further reduce the… (More)
DOI: 10.1109/TCSII.2014.2362733


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