An Area-Efficient Noise-Adaptive Neural Amplifier in 130 nm CMOS Technology

  title={An Area-Efficient Noise-Adaptive Neural Amplifier in 130 nm CMOS Technology},
  author={Vikram Chaturvedi and B. Amrutur},
  journal={IEEE Journal on Emerging and Selected Topics in Circuits and Systems},
  • Vikram Chaturvedi, B. Amrutur
  • Published 2011
  • Engineering, Computer Science
  • IEEE Journal on Emerging and Selected Topics in Circuits and Systems
  • Chronic recording of neural signals is indispensable in designing efficient brain-machine interfaces and to elucidate human neurophysiology. [...] Key Method It can be biased adaptively from 200 nA to 2 μA, modulating input referred noise from 9.92 μV to 3.9 μV. We also describe a low noise design technique which minimizes the noise contribution of the load circuitry.Expand Abstract
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