An Analysis Framework for Transient-Error Tolerance

@article{Hayes2007AnAF,
  title={An Analysis Framework for Transient-Error Tolerance},
  author={John P. Hayes and Ilia Polian and Bernd Becker},
  journal={25th IEEE VLSI Test Symposium (VTS'07)},
  year={2007},
  pages={249-255}
}
Transient or soft errors are an increasing problem in mainstream microelectronics. We propose a framework for modeling transient-error tolerance (TET) in logic circuits. We classify transient errors as critical or non-critical according to their impact on circuit behavior, such as their ability to disturb the internal state for specified periods of time. We introduce a metric called the critical soft-error rate (CSER) as an alternative to conventional SER, and present some analysis strategies… CONTINUE READING
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