An 8Mb demonstrator for high-density 1.8V Phase-Change Memories

@article{Bedeschi2004An8D,
  title={An 8Mb demonstrator for high-density 1.8V Phase-Change Memories},
  author={Ferdinando Bedeschi and Claudio Resta and Osama Khouri and E. Buda and Lu{\'i}s Costa and Mena Ferraro and Fabio Pellizzer and François-Ga{\"e}l Ottogalli and A. Pirovano and Milorad To{\vs}i and Roberto Bez and Roberto Gastaldi and Giulio Casagrande},
  journal={2004 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.04CH37525)},
  year={2004},
  pages={442-445}
}
An 8Mb Non-Volatile Memory Demonstrator incorporating a novel 0.32 /spl mu/m/sup 2/ Phase-Change Memory (PCM) cell using a Bipolar Junction Transistor (BJT) as selector and integrated into a 3V 0.18 /spl mu/m CMOS technology is presented. Realistically large 4Mb tiles with a voltage regulation scheme that allows fast bitline precharge and sense are proposed. An innovative approach that minimizes the array leakage has been used to verify the feasibility of high-density PCM memories with improved… CONTINUE READING
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