An 8-to-1 bit 1-MS/s SAR ADC With VGA and Integrated Data Compression for Neural Recording

  title={An 8-to-1 bit 1-MS/s SAR ADC With VGA and Integrated Data Compression for Neural Recording},
  author={Vikram Chaturvedi and T. Anand and B. Amrutur},
  journal={IEEE Transactions on Very Large Scale Integration (VLSI) Systems},
  • Vikram Chaturvedi, T. Anand, B. Amrutur
  • Published 2013
  • Computer Science
  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • Low power consumption per channel and data rate minimization are two key challenges which need to be addressed in future generations of neural recording systems (NRS). Power consumption can be reduced by avoiding unnecessary processing whereas data rate is greatly decreased by sending spike time-stamps along with spike features as opposed to raw digitized data. Dynamic range in NRS can vary with time due to change in electrode-neuron distance or background noise, which demands adaptability. An… CONTINUE READING
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