Algorithm and architecture design of the motion estimation for the H.265/HEVC 4K-UHD encoder

@article{Pastuszak2015AlgorithmAA,
  title={Algorithm and architecture design of the motion estimation for the H.265/HEVC 4K-UHD encoder},
  author={Grzegorz Pastuszak and Maciej Trochimiuk},
  journal={Journal of Real-Time Image Processing},
  year={2015},
  volume={12},
  pages={517-529}
}
This paper presents the algorithm and the architecture of the high-throughput motion estimation system for the H.265/HEVC encoder. The design allows the processing of 2160p@30fps videos at the clock frequency of 400 MHz. The architecture embeds two parallel processing paths for the integer-pel and the fractional-pel motion estimation. The paths share the same memories. Access conflicts are avoided by the use of dual-port modules and register buffers for reused samples. In each clock cycle, the… CONTINUE READING
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