Advances in Run-Time Performance and Interoperability for the Adapteva Epiphany Coprocessor

The energy-efficient Adapteva Epiphany architecture exhibits massive many-core scalability in a physically compact 2D array of RISC cores with a fast network-on-chip (NoC). The architecture presents many features and constraints which contribute to software design challenges for the application developer. Addressing these challenges within the software… CONTINUE READING