Advanced spice modeling for 65nm CMOS technology

Abstract

The paper presents a comprehensive study of Spice modeling for some key physical effects observed in a 65 nm CMOS process. STI-induced stress effect, well proximity effect, as well as HCI and NBTI reliability effects, which can not be neglected for technologies beyond 90 nm and must be properly modeled for accurate circuit simulations, are discussed in this… (More)

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@article{Yang2008AdvancedSM, title={Advanced spice modeling for 65nm CMOS technology}, author={Lianfeng Yang and Meng Cui and J. Ma and Jia He and Wei Wang and Waisum Wong}, journal={2008 9th International Conference on Solid-State and Integrated-Circuit Technology}, year={2008}, pages={436-439} }