Advanced design of differential CMOS PA

Abstract

A fully-integrated differential cascode linear CMOS power amplifier (PA) with adaptive gate bias circuits is reported. The active bias circuits are employed to achieve a high linearity from a deep class-AB biased common-source stage. The gate bias of the common-gate stage is adapted to linearize the severe distortion of the deep biased amplifier at a low power region. An envelope signal is injected at the gate of CS stage to linearize the amplifier further. The IMD3 asymmetry created by the memory effect due to the bias controls is suppressed using the second harmonic short circuits at the virtual grounding points. The proposed single stage PA including the bias circuit is fabricated using 0.18-m RF CMOS technology. The linear PA delivers the expected performance of high efficiency across a broad bandwidth using a wide audio band signal.

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Cite this paper

@article{Kim2014AdvancedDO, title={Advanced design of differential CMOS PA}, author={Bumman Kim and Sangsu Jin and Byungjoon Park and Yunsung Cho and Chenxi Zhao and Kyunghoon Moon}, journal={2014 IEEE Topical Conference on Power Amplifiers for Wireless and Radio Applications (PAWR)}, year={2014}, pages={31-33} }