Advanced Model and Analysis of Series Resistance for CMOS Scaling Into Nanometer Regime — Part II : Quantitative Analysis

@inproceedings{Kim2001AdvancedMA,
  title={Advanced Model and Analysis of Series Resistance for CMOS Scaling Into Nanometer Regime — Part II : Quantitative Analysis},
  author={Seong-Dong Kim and Cheol-Min Park and Jason C. S. Woo},
  year={2001}
}
Source/drain (S/D) series resistance components and device/process parameters contributing to series resistance are extensively analyzed using advanced model for future CMOS design and technology scaling into the nanometer regime. The total series resistance of a device is found to be very sensitive to the variations of the sidewall thickness, the doping concentration in the deep junction region, and the Schottky barrier height of silicide contact. A prediction of series resistance trends with… CONTINUE READING

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