• Corpus ID: 60698115

Advanced Digital Logic Design Using VHDL, State Machines, and Synthesis for FPGA's

  title={Advanced Digital Logic Design Using VHDL, State Machines, and Synthesis for FPGA's},
  author={Sunggu Lee},
This textbook is intended to serve as a practical guide for the design of complex digital logic circuits such as digital control circuits, network interface circuits, pipelined arithmetic units, and RISC microprocessors. It is an advanced digital logic design textbook that emphasizes the use of synthesizable Verilog code and provides numerous fully worked-out practical design examples including a Universal Serial Bus interface, a pipelined multiply-accumulate unit, and a pipelined… 

FPGA Specification of a Personal Digital Assistant

The design, implementation and verification of a personal digital assistant (PDA) is reported as a final project of the VLSI Design course at ITESM Campus Puebla.

An Instructional Processor Design Using VHDL and an FPGA

An instructional processor has been developed for use as a design example in an Advanced Digital Systems course and results from student homework assignments indicate that they are able to successfully design modifications to the processor and demonstrate their function via simulation.

An FPGA implementation of shift converter block technique on FIFO for RS232 to universal serial bus converter

To meet the standard modern system communication demands, the paper represents the implementation of bidirectional shift converter technique for the embedded converter RS232 to Universal Serial Bus

Showing the capabilities of VHDL description and Simulink® HDL Coder for control system

This paper shows the capabilities of VHDL description and the usage of Simulink HDL Coder for description of electronic control system without studying the electric circuits in detail. This is

Evolution of the Instructional Processor

An instructional processor has been developed for use as a design example in an Advanced Digital Systems course at The Citadel, and feedback is very positive that the VHDL model and FPGA implementation of the processor illustrate fundamental design concepts without unnecessary complexity.

Research of the Finite State Machine with Programmable Logic as a Part of Digital Information and Control System Based on FPGA

It was proved that the FSM model with a programmable logic matched these peculiarities of the information and control system algorithms in a greater degree, and a substantial decrease in the LUT number was achieved.

Accelerating video and image processing design for FPGA using HDL coder and simulink

  • J. HaiOoi Chee PunT. Haw
  • Computer Science
    2015 IEEE Conference on Sustainable Utilization And Development In Engineering and Technology (CSUDET)
  • 2015
A model based design framework based on HDL Coder, Vision HDL Toolbox and Simulink to accelerate the design of video and image solution and tackle the technical complexity and reduce development time of traditional FPGA design is presented.

Hybrid modified booth encoded algorithm-carry save adder fast multiplier

A new architecture of hybrid Modified Booth Encoded Algorithm and Carry Save Adder is developed as fast multiplier architecture that delivers good performance in terms of higher speed as well as in term of less usage of logic elements.

An Efficient O( $N$ ) Comparison-Free Sorting Algorithm

A novel sorting algorithm that sorts input data integer elements on-the-fly without any comparison operations between the data—comparison-free sorting is proposed.

ρ-VEX: A reconfigurable and extensible VLIW processor

Results of benchmarks on real hardware show that different configurations of the ρ-VEX processor in a stand-alone environment lead to considerable cycle count reductions for a selected benchmark application, and an application development framework to optimally exploit the freedom of reconfigurable operations is presented.