Addressable test ports an approach to testing embedded cores

@inproceedings{Whetsel1999AddressableTP,
  title={Addressable test ports an approach to testing embedded cores},
  author={Lee Whetsel},
  booktitle={ITC},
  year={1999}
}
This paper describes work in TI towards an approach to improve testing of cores embedded within system ICs by providing an addressable test port on each core. The addressable test ports provide the capability of directly addressing a core to be tested and, once addressed, effectively testing the addressed core. The addressable test port is scalable, allowing it to increase or decrease its test capabilities, depending upon the test requirements of core circuitry being tested. 
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