Adaptive Dynamic On-chip Memory Management for FPGA-based reconfigurable architectures

@article{Dessouky2014AdaptiveDO,
  title={Adaptive Dynamic On-chip Memory Management for FPGA-based reconfigurable architectures},
  author={Ghada Dessouky and Michael Klaiber and Donald G. Bailey and Sven Simon},
  journal={2014 24th International Conference on Field Programmable Logic and Applications (FPL)},
  year={2014},
  pages={1-8}
}
In this paper, an adaptive architecture for dynamic management and allocation of on-chip FPGA Block Random Access Memory (BRAM) resources is presented. This facilitates the dynamic sharing of valuable and scarce on-chip memory among several processing elements (PEs), according to their dynamic run-time memory requirements. Different real-time applications are becoming increasingly dynamic which leads to unexpected and variable memory footprints, and static allocation of the worst-case memory… CONTINUE READING

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