Activity-Driven Fine-Grained Clock Gating and Run Time Power Gating Integration

@article{Li2013ActivityDrivenFC,
  title={Activity-Driven Fine-Grained Clock Gating and Run Time Power Gating Integration},
  author={Li Li and Ken Choi and Haiqing Nan},
  journal={IEEE Transactions on Very Large Scale Integration (VLSI) Systems},
  year={2013},
  volume={21},
  pages={1540-1544}
}
As the two most widely used techniques to reduce dynamic power and leakage power, clock gating (CG) and power gating (PG), respectively, are expected to be integrated together effectively. Normally, the implementation of CG leads to some redundant operations, which provides the opportunity to apply PG. In this brief, we have proposed an activity-driven fine-grained CG and PG integration. First, we introduce an optimized bus-specific-clock-gating (OBSC) scheme to improve traditional XOR-based CG… CONTINUE READING

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