Active pixel image sensor scale down in 0.18 /spl mu/m CMOS technology

@article{Chien2002ActivePI,
  title={Active pixel image sensor scale down in 0.18 /spl mu/m CMOS technology},
  author={Ho-Ching Chien and Shou-Gwo Wuu and Dun-Nian Yaung and Chien-Hsien Tseng and J. C. Lin and C. S. Wang and Chin-Kung Chang and Yu-Kung Hsiao},
  journal={Digest. International Electron Devices Meeting,},
  year={2002},
  pages={813-816}
}
A high performance 0.18 /spl mu/m CMOS image sensor technology is reported in this paper. It is modified from a generic logic technology. A 64/spl times/64 3T pixel array of various pixel size from 2.8 /spl mu/m to 4.0 /spl mu/m is used to study the scale down issues. By optimizing the process flow, the image sensors with the pixel size downscaled to 2.8 /spl mu/m demonstrates the high sensitivity, low dark current, low white pixel rate and high dynamic range. Although the crosstalk effect is… CONTINUE READING

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