Accurate and efficient gate-level parametric yield estimation considering correlated variations in leakage power and performance

@article{Srivastava2005AccurateAE,
  title={Accurate and efficient gate-level parametric yield estimation considering correlated variations in leakage power and performance},
  author={Ashish Srivastava and Saumil Shah and Kanak Agarwal and Dennis Sylvester and David Blaauw and Stephen W. Director},
  journal={Proceedings. 42nd Design Automation Conference, 2005.},
  year={2005},
  pages={535-540}
}
Increasing levels of process variation in current technologies have a major impact on power and performance, and result in parametric yield loss. In this work we develop an efficient gate-level approach to accurately estimate the parametric yield defined by leakage power and delay constraints, by finding the joint probability distribution function (jpdf) for delay and leakage power. We consider inter-die variations as well as intra-die variations with correlated and random components. The… CONTINUE READING
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