In this paper, we present an accurate model for prediction of physical desi n characteristics, such as interconnection lengths a n f layout areas, for standard cell layouts. This model produces accurate shape constraint functions (height versus width of the layout over a range of aspect ratios) by considering the lo ic design specification, the physical design process a n f the physical implementation technology. Random and optimized placements, global and detailed routing are each abstracted by procedural models that capture the im ortant f e a tures of these processes. E uations that deine the rocedural model are presentet? Predictions of layout cgaracteristics that are within 10% of the actual layouts are achieved over a range of circuit functions and sizes. We have verified both the global characteristics (total interconnection length and layout area) and the detailed characteristics (wire length and feedthrough distributions) of the model. Accurate prediction of physical design characteristics are useful for floorplanning, for evaluating the fit of a logic design to a fabrication technology, and for studying placement algorithms.