Accumulator based deterministic BIST

@inproceedings{Dorsch1998AccumulatorBD,
  title={Accumulator based deterministic BIST},
  author={Rainer Dorsch and Hans-Joachim Wunderlich},
  booktitle={ITC},
  year={1998}
}
Most built-in self test (BIST) solutions require specialized test pattern generation hardware which may introduce significant area overhead and performance degradation. Recently, some authors proposed test pattern generation on chip by means of functional units also used in system mode like adders or multipliers. These schemes generate pseudo-random or pseudo-exhaustive patterns for serial or parallel BIST. If the circuit under test contains random pattern resistant faults a deterministic test… CONTINUE READING

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