Accelerating arithmetic kernels with coherent attached FPGA coprocessors

@article{Giefers2015AcceleratingAK,
  title={Accelerating arithmetic kernels with coherent attached FPGA coprocessors},
  author={Heiner Giefers and Raphael Polig and Christoph Hagleitner},
  journal={2015 Design, Automation & Test in Europe Conference & Exhibition (DATE)},
  year={2015},
  pages={1072-1077}
}
The energy efficiency of computer systems can be increased by migrating computational kernels that are known to under-utilize the CPU to an FPGA based coprocessor. In contrast to traditional I/O-based coprocessors that require explicit data movement, coherently attached accelerators can operate on the same virtual address space than the host CPU. A shared memory organization enables widely accepted programming models and helps to deploy energy efficient accelerators in general purpose computing… CONTINUE READING

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References

Publications referenced by this paper.
Showing 1-10 of 13 references

Coherent Accelerator Processor Interface (CAPI) for POWER8 Systems

  • B. Wile
  • IBM White Paper, Sep 2014.
  • 2014
2 Excerpts

OpenCL 2.0 Specification

  • Khronos OpenCL Working Group
  • 2014.
  • 2014
1 Excerpt

OpenCL Design Examples

  • Altera Corp.
  • http://www.altera.com/ support/examples/opencl…
  • 2014
1 Excerpt

The Xilinx SDAccel Development Environment

  • Xilinx, Inc.
  • 2014.
  • 2014
1 Excerpt

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