Accelerating Gate Sizing Using Graphics Processing Units

  title={Accelerating Gate Sizing Using Graphics Processing Units},
  author={Bing Shi and Yufu Zhang and Ankur Srivastava},
  journal={IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},
In this paper, we investigate the gate sizing problem and develop techniques for improving the runtime by effectively exploiting the graphics processing unit (GPU) resources. Theoretically, we investigate a randomized cutting plane-based convex optimization technique which is highly parallelizable and can effectively exploit the single instruction multiple… CONTINUE READING