ATM shared-memory switching architectures

Abstract

ATM will provide flexibility in bandwidth allocation and will allow a network to carry heterogeneous services ranging from narrowband to wideband services. The challenge is to build fast packet switches able to match the high speeds of the input links and the high performance requirements imposed. The CCITT has standardized the asynchronous transfer mode (ATM) as the multiplexing and switching principle for the broadband integrated services digital network (B-ISDN). ATM is a packet and connection-oriented transfer mode based on statistical time division multiplexing techniques. The information flow is organized in fixed-size packets called cells, consisting of a user information field (48 octets) and a header (5 octets). The primary use of the header tag is to identify cells belonging to the same virtual channel and to make routing possible. Cell sequence on a virtual channel is preserved, a very low cell loss probability must be guaranteed (< 10/sup -/12), and intensive error and flow control protocols are provided at the edges of the network.<<ETX>>

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@article{GarcaHaro1994ATMSS, title={ATM shared-memory switching architectures}, author={Javier Garc{\'i}a-Haro and Andrzej Jajszczyk}, journal={IEEE Network}, year={1994}, volume={8}, pages={18-26} }