ASP: a cost-effective parallel microcomputer

  title={ASP: a cost-effective parallel microcomputer},
  author={R. Mike Lea},
  journal={IEEE Micro},
  • R. Lea
  • Published 1 September 1988
  • Computer Science
  • IEEE Micro
The author presents ASP architecture, which offers cost-effective support of a wide range of numerical and nonnumerical computing applications, using state-of-the-art microelectronic technology to achieve processor packing densities that are more usually associated with memory components, ASP is designed to benefit from the inevitable VLSI-to-ULSI-to-WSI (very large, ultra large, and wafer-scale integration) technological trend, with a fully integrated, simply scalable, and defect/fault… 

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